@@ -34,14 +34,7 @@ In addition to these efforts, we also aim at providing valuable contribution in
***Support the development of EDA tools** by advising on, and contributing to, the development of FOSS IC design software
***Increase the scope and quality of available free silicon IP libraries** by developing our own libraries and contributing to the development of others
## Our roadmap
The roadmap itself can be found here through the [Roadmap Wiki Link](https://wiki.libresilicon.com/index.php?title=Roadmap#Our_roadmap)
Here's an overview of what we have done so far.
### Standard Cell Library Generator
## Standard Cell Library Generator
Standard Cells are the basic building blocks of modern chip-design, they are used to automatically synthesize, place and route digital logic into chips. The synthesis step (e.g. done with yosys) chooses which standard cells should be used to implement the given logic, then the placement step places the cells on a grid, then the routing step connects the standard cells with metal connections for power and signals. At Libresilicon we believe that having many more standard cells will make the overall designs more efficient because the synthesis engine can choose from more cells, therefore we are automating the generation of whole standard cell libraries.
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@@ -58,14 +51,11 @@ The initial project was the manually designed Pearl River for 1um process:
Pearl River was actually produced in the lab of HKUST in 2018 (Hong Kong University of Science and Technology) and transistors were tested successfully:
[DIVTable]
In 2023 we developed the automated successor, called DanubeRiver and taped it out successfully in cooperation with Google on GobalFoundries GF180.
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@@ -86,3 +76,16 @@ This is a fully open source, fully documented (process specifications, DRC rules
The tests had started at HKUST, but were interrupted and haven’t been completed yet.
Several universities have adopted the process documentation in their lectures to teach CMOS manufacturing, e.g. JKU Linz (Austria).
The long term goal is to find alternative chemical recipes, which allow for private hobbyists to make their own chips without having to use very dangerous gasses like Silane, here is a not yet reliably verified alternative recipe for depositing Polysilicon for example: [Eco friendly Polysilicon deposition_(CVD)](https://wiki.libresilicon.com/index.php?title=Eco_friendly_Polysilicon_deposition_(CVD))
