No time anymore for fixing those 20 DRC violations before the next tapeout

This reverts commit baa0c66b.

Half the frigging structures were missing.

Am I the only person writing code here?!

There have been issues with xmin ymin being negative instead of 0

Fixing placing and wiring using more GDSFactory features

Fix the wiring of the FETs

There was a problem with file paths in the SVG file name
when numbering several wafers.

Fixing issue with rendering of documentation

Make sure only available processes can be configured

Config is missing process name

Finally calculating the actual area of the capacities, addressing the
missing values in the documentation, according to #10

The configuration has been simplified and parameters for the script have
been eliminated, so the README has to be updated in order to reflect those
changes.

The Python tech files have been moved to LibrePDK and the name of
the process/technology is being specified in the configuration file.