From 7da53c19550dd3219a1eed569a9e5728578f43be Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <leviathan@libresilicon.com> Date: Sun, 26 May 2024 20:01:55 +0100 Subject: [PATCH] Move it to the wiki --- markdowns/index/large_content.md | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/markdowns/index/large_content.md b/markdowns/index/large_content.md index 8dfd455..987bfa4 100644 --- a/markdowns/index/large_content.md +++ b/markdowns/index/large_content.md @@ -34,21 +34,5 @@ In addition to these efforts, we also aim at providing valuable contribution in * **Support the development of EDA tools** by advising on, and contributing to, the development of FOSS IC design software * **Increase the scope and quality of available free silicon IP libraries** by developing our own libraries and contributing to the development of others -## Our roadmap -As of 2021, our tentative roadmap is the following: - -* Eastablishment of LibreSilicon Foundation in Europe -* Finish LS1U technology node (incl. SPICE parameter extraction) -* Development of ESD protection and pad cell library for LS1U -* Development of a maskless lithography stepper, initially at least for 50um MFS, later for LS1U -* Tech Demo: LS555 (design, MLL fabrication, testing) -* Digital cell library for 1u MFS + digital tools (may be parallel to LS1U/LS555) -* Tech demo II: 8-bit Arduino-compatible MCU -* ... -* Libresilicon Fabrication Service opens in EU -* ... -* Development of LS130 technology node (incl. MLL capablity) -* Tech demo III: 130nm System-on-Chip -* ... -* Development of sub-100nm technology node (incl. MLL capablity) -* Tech demo IV: SOC made on LibreSilicon runs GNU/Linux +[## Our roadmap](https://wiki.libresilicon.com/index.php?title=Roadmap#Our_roadmap) + -- GitLab