diff --git a/process_abstract.tex b/process_abstract.tex
index 26aaa46cf7e39e3b1ca72b6b10a3a132c77a29ef..425e280be8d4d7f7bfb12a3434cde16cca3517a6 100644
--- a/process_abstract.tex
+++ b/process_abstract.tex
@@ -6,7 +6,7 @@ as published by the Libre Silicon alliance, either version 1 of the License, or
 This design is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 See the Libre Silicon Public License for more details. \\
 
-This document is part of the specification of the free silicon manufacturing standard for manufacturing the LibreSilicon standard logic cells\footnote{\url{https://github.com/chipforge/StdCellLib}} and related free technology nodes from the LibreSilicon project.
+This document is part of the specification of the free silicon manufacturing standard for manufacturing the LibreSilicon standard logic cells\footnote{\url{https://git.libresilicon.com/?p=redmine/standard-cell-lib.git;a=summary}} and related free technology nodes from the LibreSilicon project.
 
 For this initial revision 0.1 a gate-first approach has been chosen which led to the choice of polysilicon as the gate electrode material because of the simplicity of the gate alignment.
 For better isolation properties of the transistors and gates in overall a box-isolation approach has been chosen.
diff --git a/process_implementations/generic/compact.tex b/process_implementations/generic/compact.tex
index a620487126d43965382e0dd16864f2979a48ee9c..a2bb89129db53af36a2931e8715875a73395b5be 100644
--- a/process_implementations/generic/compact.tex
+++ b/process_implementations/generic/compact.tex
@@ -40,7 +40,7 @@
 	
 	For further clarification consult the complete documentation of the process.
 
-	\footnotetext[1]{https://github.com/leviathanch/ls180nm}
+	\footnotetext[1]{https://git.libresilicon.com/?p=redmine/librepdk.git;a=summary}
 \end{abstract}
 \vfill
 \newpage
@@ -98,4 +98,4 @@ Silicon dioxide growth &
 
 
 
-\end{document}
\ No newline at end of file
+\end{document}
diff --git a/process_steps/process_lowtech/Makefile b/process_steps/process_lowtech/Makefile
index 623d432b3cdc4cc68277a567a4a4e822b7c952d8..5c963070fbd67c6e095fc78a2e781a0ed5de70fb 100644
--- a/process_steps/process_lowtech/Makefile
+++ b/process_steps/process_lowtech/Makefile
@@ -1,8 +1,21 @@
-PDF:
-	xelatex process_lowtech_steps.tex
+tikzdeps = $(wildcard tikz_process_steps/*.tex)
+
+tikzdeps = $(wildcard tikz_process_steps/*.tex)
+
+texs = $(wildcard *.tex)
+
+pdfs = process_lowtech_steps.pdf
+
+$(pdfs): %.pdf:%.tex $(tikzdeps) $(texs)
+	max_in_open=32 xelatex $<
+	max_in_open=32 xelatex $<
+
+all: $(pdfs)
 
 clean:
 	rm -f *.log
 	rm -f *.gz
 	rm -f *.aux
 	rm -f *.toc
+	rm -f *.pdf
+	rm -f *.idx
diff --git a/process_steps/process_lowtech/process_lowtech_nwell.tex b/process_steps/process_lowtech/process_lowtech_nwell.tex
index c2b298bc35ec2d65465456da2727a14138d8f831..b288e54e8b4bcf495143c1e09d2e39bb14404cfb 100644
--- a/process_steps/process_lowtech/process_lowtech_nwell.tex
+++ b/process_steps/process_lowtech/process_lowtech_nwell.tex
@@ -15,7 +15,7 @@ The cross section as well as the top view of the targeted geometry are shown in
 
 The N-well will serve us as an island of N-doped substrate within the P-doped basis substrate.
 
-The dopant dose will be $2.5\times10^{12}cm^{-2}$ as calculated in the documentation of the process design leading to these steps\footnote{\url{https://github.com/leviathanch/libresiliconprocess/raw/master/process_design/process_design.pdf}}.
+The dopant dose will be $2.5\times10^{12}cm^{-2}$ as calculated in the documentation of the process design leading to these steps\footnote{\url{https://download.libresilicon.com/process/v1/process_design.pdf}}.
 
 \begin{figure}[H]
 	\centering
diff --git a/process_steps/process_lowtech/process_lowtech_pwell.tex b/process_steps/process_lowtech/process_lowtech_pwell.tex
index 8850cffec8b1c474571f486f7dd65df96e1e7c32..93459143b994e8fe806457df1a79d481a30a4d2c 100644
--- a/process_steps/process_lowtech/process_lowtech_pwell.tex
+++ b/process_steps/process_lowtech/process_lowtech_pwell.tex
@@ -14,7 +14,7 @@ The cross section as well as the top view of the targeted geometry are shown in
 \end{figure}
 The P-well will serve us as an island of higher p-doped substrate within the slightly p-doped basis substrate.
 
-The dopant dose will be $2.5\times10^{12}cm^{-2}$ as calculated in the documentation of the process design leading to these steps\footnote{\url{https://github.com/leviathanch/libresiliconprocess/raw/master/process_design/process_design.pdf}}.
+The dopant dose will be $2.5\times10^{12}cm^{-2}$ as calculated in the documentation of the process design leading to these steps\footnote{\url{https://download.libresilicon.com/process/v1/process_design.pdf}}.
 
 \begin{figure}[H]
 	\centering
@@ -204,4 +204,4 @@ Now we want to remove the silicon mask from the wafer and clean it for another c
 	\caption{Oxide removal}
 \end{figure}
 
-We use buffered hydrofluoric acid (BOE (1:6)) at room temperature for 5 minutes in order to remove the 500nm of oxide layer.
\ No newline at end of file
+We use buffered hydrofluoric acid (BOE (1:6)) at room temperature for 5 minutes in order to remove the 500nm of oxide layer.
diff --git a/process_steps/process_lowtech/process_lowtech_steps.pdf b/process_steps/process_lowtech/process_lowtech_steps.pdf
index b7528bece86bc6b91c50b22ea5158e1328cb5691..ee57878fd7cca9d8abd84efcfc0b162124524a0a 100644
Binary files a/process_steps/process_lowtech/process_lowtech_steps.pdf and b/process_steps/process_lowtech/process_lowtech_steps.pdf differ