diff --git a/DanubeRiver/fet.py b/DanubeRiver/fet.py
index 6d7e9d0ee3d56671bcc9c683ccf80e9783d0e90c..5dcc1f62b6b2be29b75e3de0e021704598af3cce 100644
--- a/DanubeRiver/fet.py
+++ b/DanubeRiver/fet.py
@@ -46,10 +46,11 @@ class DanubeTestMOSFET(AbstractDanubeStructure):
 		return ret
 
 	def generate_mos(self, mtype, dims):
-		fet = FET(self.config, self.name+"_transistor", mtype, dims, have_bulk_tap=True)
+		fet = FET(self.config, self.name+"_transistor_", mtype, dims, have_bulk_tap=True)
 		x = lph.to_nm(self.config, self.left_lower_corner[0]+(self.pitch-fet.xsize*self.ureg.nm)/2)
 		y = lph.to_nm(self.config, self.left_lower_corner[1]+(self.pitch-fet.ysize*self.ureg.nm)/2)
 		fet = fet.move([x,y])
+		fet.name=self.name+"_transistor"
 		self << fet
 		rw = lph.to_nm(self.config, self.config.get_min_width(self.conlayer_name))
 		# TODO: Quad routing flag!